1. Field of the Invention
The invention is generally related to integrated circuit (IC) chip design.
2. Related Art
In order to design a very large IC chip, a two-level hierarchical structure is sometimes employed. In accordance with this approach, lower level blocks are developed to a specification and then glued together at an upper level. The lower level blocks are often referred to as “tiles” and when assembled to form the chip, they often have small gaps between each other known as grout. The upper level is often referred to as the “chip-tile.” From a connectivity perspective, the only thing that needs to be done at the chip-tile level is ensure connectivity between the various tiles. That is, the chip-tile level must provide wiring that enables tiles that share a signal to propagate the signal from one tile to the other tile. However there are fundamental limitations in the underlying process technology that complicate this step. One issue is that interconnect wires connecting the tiles together are traditionally poor conductors of high speed signals, at least from a resistance and capacitance perspective. For recent IC chip designs, it has been observed that the maximum distance a signal can be driven before it needs to be repeated is about 1 millimeter (mm). Since an IC chip can be upwards of 20 mm on a side, it becomes readily apparent that many repeaters will be needed.
Repeaters are devices that are commonly used to drive long resistive interconnects. Conventionally, the repeaters are buffers, i.e., signal amplifiers. However, there is a limitation to this approach. It still takes time for the signal to pass along the wire. For a recent IC chip design, it has been observed that in a given clock cycle (500 MHz=>2 nS), a signal can travel about 5 mm using 4 repeater buffers. Conventional approaches do not provide a solution to enabling signals to travel greater distances.
A more significant issue is that the interconnect wires are now crossing large tiles that may be, for example, in excess of 4 mm on a side. One therefore needs to insert repeaters over a tile. Unfortunately, due to the limits of conventional process technology, one can only form active devices (e.g., transistors) on the semiconductor substrate, i.e., the bottom layer of the process as opposed to the chip-tile level. Repeaters considered to be active devices. Thus, one now has a choice—one can cut a hole in the tile to allow repeaters to be dropped into it or one can “pre-seed” the tile with repeaters and use them for wires that cross or “fly” over the tile.
What is needed, therefore, is an improved method for using repeaters to carry signals between the low level blocks, or tiles, of an IC chip that overcomes the distance limitation associated with the use of buffer-type repeaters (i.e., the limit on the distance a signal can be driven in a single clock cycle). What is also needed is an improved method that automates the process by which chip designers allocate and insert repeaters into the tiles of the IC chip.